This application claims the benefit of Korean Patent Application No. P 2000-38014, filed on Jul. 4, 2000, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a LCD (Liquid Crystal Display), and more particularly, to an LCD having a balanced layer of liquid crystal.
2. Background of the Related Art
Thin-film transistor liquid crystal displays (TFT-LCD""s) are widely used as display elements for LCD TVs, notebook PCs, LCD game machines, projection TVs, high definition TVs (HD-TVs), and the like. Recent interest in flat panel displays has led to the development of flat panel TFT-LCDs, and demand for these devices is steadily increasing. The development of TFT-LCD""s and their applications are driven, and sometimes accelerated by a desire for display panel size increase and/or enhanced resolution. Accordingly, there have been ceaseless efforts to simplify the fabrication process and improve manufacturing yields of TFT-LCDs to attain increased productivity at low cost.
Unlike a Plasma Display Panel (PDP) or a Field Emission Display (FED), an LCD requires back lighting to illuminate the display screen. The back light is a light source that is provided to transmit light through a plurality of separately controllable liquid crystal pixels formed in the LCD. In operation, the transmissivity of light from the light source is varied in accordance with voltages applied across electrodes provided on either side of the liquid crystal. The transmissivity through a pixel may be varied independently for each pixel utilizing electrooptic properties of the liquid crystal injected inside the panel. The liquid crystal directs the light from the back light to display an image on the LCD panel screen according to a pattern of pixels that are charged with a voltage.
FIG. 1 is a simplified plan view of an LCD layout the related art. Referring to FIG. 1, the related art LCD includes a plurality of gate lines 11 formed at fixed intervals and data lines 13 formed perpendicular to the gate lines 11. At each intersection of the gate lines 11 and the data lines 13, a TFT is provided for controlling a voltage charged to an LCD pixel associated with the TFT. Each TFT includes a gate electrode 11a extending from the gate line 11, source and drain electrode 13a extending from the data line 13, drain electrode 13b and pixel electrode 15 connected to the drain electrode 13b. A storage capacitor 17 is provided for sustaining a charged liquid crystal voltage and is formed by an overlap of the gate line 11 and the pixel electrode 15.
FIG. 2 provides a cross-sectional view of the related art LCD pixel taken across a line I-Ixe2x80x2 in FIG. 1 to illustrate details of an LCD pixel structure. As shown in FIG. 2, a pixel TFT and capacitor are formed on the substrate 21. The TFT includes a gate electrode 23. On the gate electrode 23 and the substrate 21 is formed a gate insulating film 27. An amorphous silicon (a-Si) active layer 29 and a divided n+ layer 30 are stacked on the gate insulating film 27 over the gate electrode 23. A source electrode 32 and a drain electrode 34 are formed on the n+ layer 30 and spaced from one another. Spaced from the TFT is a first electrode 25 of the storage capacitor. The gate insulating film 27 extends over the substrate 21 and covers the first storage capacitor electrode 25. A second electrode 25a of the storage capacitor is formed on the extended gate insulating film 27 over the first electrode 25 of the storage capacitor. A passivation layer 36 is formed on the entire resultant surface that includes the source electrode 32, the drain electrode and 34, and the second electrode 25a of the storage capacitor. A pixel electrode 38 is formed on the passivation layer 36 an is connected to the drain electrode 34 and the second electrode 25a of the storage capacitor through contact holes formed in the passivation layer 36.
Overlying the first substrate 21 is a second transparent substrate 21a. On the second substrate 21a, a black matrix (light shielding) layer 40 and a color filter layer 42 are formed on the second substrate 21a. A common electrode 44 is formed on an entire surface inclusive of the color filter layer 42 and the black matrix layer 40. A liquid crystal layer 100 is provided between the first substrate 21 and the second substrate 21a. However, a large step difference exists in the area of the substrate 21 where the storage capacitor Cs is formed. To compensate for an unbalance caused by the difference in height around the area of capacitor Cs, spacers 101 and 103 are provided to restrict a gap between the first substrate and the second substrate 21a, and to maintain an appropriate thickness of the liquid crystal layer 100. The liquid crystal layer 100 typically has a thickness of approximately 5 xcexcm in areas of the pixel absent the steps formed by the capacitor Cs and the TFT. The spacers are plastic granules that are compressible by 10xcx9c20% of an uncompressed granule diameter.
The related art LCD of FIG. 2 shows how a step difference of 1.25 xcexcm in the area of storage capacitor Cs is compensated when it is desired that the liquid crystal layer 100 has a thickness of 5.1 xcexcm in areas of the pixel where no step differences exist. Spacers 101 and 103 have uncompressed diameters of approximately 4.75 xcexcm. When the first substrate 21 including the TFT and capacitor Cs and the second substrate 21a including the shielding layer 40, color filter layer 42 and the common pixel electrode 44 are arranged to provide the desired liquid crystal thickness, the spacer 101 in the region of the storage capacitor Cs is compressed approximately 20%. However, in the region outside area of capacitor Cs, the spacer 103 is not compressed, and thus retains its diameter approximately 4.75 xcexcm to allow for a balance of liquid crystal thickness in this region.
In the related art LCD, when a signal voltage is provided by a gate driver (not shown) to the gate electrode 23 of the TFT, the TFT is turned on to provide a signal on the data line to the pixel electrode 38 connected to the drain electrode 34. The signal provided to the pixel electrode 38, together with a common voltage level (relative to the signal on electrode 38) applied to common electrode 44, defines a voltage difference across electrodes 38, 44 to thereby charge the pixel cell. The liquid crystal layer 100 and the spacers 101 and 103 for adjusting the gap between the first and second substrates 21 and 21a are located between the pixel electrode 38 and common electrode 44. More specifically, a signal voltage applied between the common electrode 44 on the second substrate 21a and the pixel electrode 38 on the first substrate 21 controls the orientation of molecules of the liquid crystal between the electrodes to allow control of the transmissivity of light through a liquid crystal cell in accordance with the applied voltage.
However, the related art LCD has the following problems. When the spacer 101 in the region of the storage capacitor is compressed by 20% of its diameter, a 0.35 xcexcm gap difference still remains between the regions of the pixel where no storage capacitor Cs is formed. In this case, there is a thickness difference of the liquid crystal layer between a region where a storage capacitor is formed and the regions surrounding the capacitor. As a measure for accommodating height differences, spacers of elastic granules are provided in the related art. However, the spacers of the related art cannot compensate for step differences that exceed an elastic range of the spacers. In this case, gaps form in parts of the liquid crystal layer causing in blurs and ripples on the screen and resulting in poor picture quality. Thus, there remains a need in the art for LCD structures that compensate for step differences within panel substrates to maintain an effective gap for liquid crystal provided between the substrates.
Accordingly, the present invention is directed to a liquid crystal display (LCD) that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
One aspect of the present invention is an LCD in which a height difference of a liquid crystal layer is compensated to form a uniform liquid crystal layer on an entire region.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description, and claims hereof as well as the appended drawings.
To achieve these and other advantages in accordance with the present invention, as embodied and broadly described the liquid crystal display includes a first substrate, a thin film transistor and a storage capacitor provided on the first substrate, a second substrate, a color filter layer on the second substrate and including a recess at a location opposite to the storage capacitor, a common electrode on the color filter layer, and a liquid crystal layer including spacers between the first and second substrates.
In another aspect of the present invention, a liquid crystal display device includes a first substrate. A plurality of gate lines and a plurality of data lines are provided on the first substrate, and the data lines cross the gate lines. A thin film transistor and a pixel electrode are arranged at each intersections of the gate lines and data lines and a storage capacitor is defined by an overlap of one of the pixel electrodes and one of the plurality of gate lines. A black matrix layer is formed on a second substrate opposite the first substrate for blocking transmission of light through parts of the liquid crystal display excluding the pixel electrode. A color filter layer is formed on an substantially an entire surface of the second substrate inclusive of the black matrix layer and including a recess at a location opposite the storage capacitor. A common electrode is formed on substantially an entire surface of the color filter layer, and a liquid crystal layer including spacers is formed between the first and second substrates.
In yet another aspect of the present invention, a display apparatus includes a plurality of pixels arranged into a array between a first substrate and a second substrate. Each of the plurality of pixels display a unit portion of an image corresponding to a data signal of a plurality of data signals. A first driver is provided for selectivity applying the plurality of data signals along respective ones of a plurality of data lines provided on a first substrate. A plurality of switches are arranged into an array on a first substrate and are addressable by control signals provided along a plurality of control lines on the first substrate. A second driver is provided for selectively applying the control signals to the control lines. A charge storing capacitor is associated with each of the switches and is provided on the first substrate. The capacitor stores charge provided by one of the data lines when the switch associated with the capacitor is driven in an on state. Because each of the capacitors form a step structure on the first substrate, spacers are arranged between the first and second substrates for maintaining a gap therebetween. The spacer means are positioned over the step structure and in areas other than over the step structure, and the second substrate includes compensating means for accommodating at least a portion of the spacer over the step structure in correspondence with a height of the step to thereby maintain a substantially uniform cell gap.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.